TechRepublic

8 Bit RISC Processor Using Verilog HDL

RISC is a design philosophy to reduce the complexity of instruction set that in turn reduces the amount of space, cycle time, cost and other parameters taken into account during the implementation of ...
TechRepublic

64-Bit RISC Processor Design Using Verilog

The Reduced Instruction Set Computer (RISC) is a microprocessor design principle that favors a smaller and simpler set of instructions that all take same amount of time to execute. RISC architecture ...
Hackaday

eda playground

Last time I looked at a simple 16-bit RISC processor aimed at students. It needed a little help on documentation and had a missing file, but I managed to get it to simulate using a free online tool ...
Design-Reuse

Brand new 32-bit RISC core: XAP3 ASIC processor liberates embedded systems industry with very high code density, low power and software flexibility

September 14, 2004 - Today, Cambridge Consultants launches a novel 32-bit RISC core that brings a new level of code density and power economy to deeply-embedded applications. The XAP3 core is ...